T2: A Highly Accurate and Energy Efficient Stride Prefetcher

Prefetching is a central element in most microarchitectures. Many different algorithms have been proposed with varying degrees of complexity and effectiveness. There is a tradeoff among various aspects of coverage, accuracy, and cost, especially when we try to exploit both simpler access patterns and more complex ones simultaneously. In this paper, we propose a design that only targets canonical strided access patterns, but does so with a very high accuracy. Compared to many other state-of-the-art prefetchers, sometimes with much more ambitious coverage, our design incurs much less memory traffic, reduces energy consumption, while still performs better on average.