Pushing the envelope: Beyond two billion IP routing lookups per second on commodity CPUs

Over the past two decades, implementing routing lookups in dedicated hardware has been accepted as an undisputable gold standard in core Internet routers due to ever increasing performance requirements and unabated global routing table growth. Several recent proposals depart from that line of thinking and suggest that software algorithms running on commodity multi-core CPUs might (again) become well suited for the task. In this article we describe a refined implementation of the DXR routing lookup scheme and subject it to a series of synthetic tests using BGP table snapshots from major Internet exchange points. Our measurements show that the algorithm scales nearly linearly on contemporary multi-core microprocessors, while the achieved peak aggregate throughput of almost 2.5 billion lookups per second presents an over a threefold increase over previously published results. Our experiments show that the aggregate throughput of a software routing lookup algorithm running on a modern commodity microprocessor can outperform a state-of-the-art ASIC chip by more than an order of magnitude, with reasonable expectations that this gap could easily double on the emerging 32- and 36-thread commodity CPUs.