Implementation of single-phase modified SRF-PLL using model based development approach

Grid synchronisation plays a vital role in grid tied inverters where the phase, frequency and voltage amplitude of grid is a critical information. In order to extract this information accurately, an improved technique of single-phase synchronous reference frame phase locked loop (SRF-PLL) is used in grid tied inverters. This method uses a transport delay block and a changed Park transform in such a way that the overall system performs well in frequency varying and harmonically distorted grid. The purpose of this work is to employ the model based development (MBD) approach on improved SRF-PLL algorithm, in order to automatically generate production quality code, increase productivity and shorten the development time of grid synchronisation module in grid tied inverters. The efficiency of proposed development approach is verified, tested and validated using off-line MATLAB/Simulink simulation, hardware-in-loop (HIL) real time simulation, software-in-loop (SIL) simulation. Hardware implementation and simulation results show potential application of MBD applied to improved SRF-PLL in grid tied inverter for synchronisation.