A 110-dB-THD, 18-mW DAC using sampling of the output and feedback to reduce distortion

A one-bit digital-to-analog converter architecture is presented that reduces distortion through the use of feedback. The only critical circuit in this architecture is identical to the first integrator of a /spl Delta//spl Sigma/ analog-to-digital converter. All other circuits in the system are embedded in the feedback loop, which reduces the effects of their nonidealities. Special attention was given to the distortion arising from the discrete-time to continuous-time interface. The feedback loop is a conditionally stable system using multipath feedforward compensation. A total harmonic distortion of -110 dB is achieved. The signal-to-noise ratio is 114 dB in 400 Hz, and out-of-band noise is below -50 dB using only one external component. The power consumption is 18 mW from a 5-V supply. Die area is 3.6 mm/sup 2/ in 0.6-/spl mu/m DPTM-CMOS technology.