CalmRISC/sup TM/: a low power microcontroller with efficient coprocessor interface

The paper presents the low power architecture of CalmRISC, a low power 8-bit microcontroller consuming only 0.1 mW per MIPS at 3.0 V, and its efficient coprocessor interface. The architectural consideration of CalmRISC for low power consumption is presented. Some low power circuit design schemes, as well as an efficient coprocessor interface scheme in CalmRISC are proposed and discussed.