Analysis of screening effects in multiple-gate and gate-all-around Si NW array FETs

The performance of Silicon nanowire (NW) FETs with multiple parallel cylinderical channels can significantly be affected by screening effects depending on the gate structure. This work analyzes electrostatic screening effects in single gate (SG) and double gate (DG) structures and compares the related transistor performance to gate-all-around (GAA) Si nanowire (NW) FET structures. As a measure for screening effects, the current density per gate width is studied for the above mentioned structures and the results are discussed for different distances between the channels in SG and DG structures. The impact of screening effects on the transit frequency (/τ) of the SG, DG and GAA structures is evaluated based on a small-signal frequency dependent analysis. It is shown that the screening effect varies significantly not only with the distance between Si NWs (possible number of channels) but also with the device structure (SG and DG Si NW FETs).