Efficient realization of FPGA-based two dimensional discrete cosine transform

In this paper, a new algorithm for the computation of a 2-D DCT is presented. The computation complexity as measured in terms of the number of multiplications and additions is kept to a minimum. The algorithm is amenable to implementation using field programmable gate arrays (FPGAs). An example of a 4/spl times/4 2-D DCT is presented, and its performance is evaluated.