A methodology for validation of system level synchronization in different interface standards for automotive microcontroller

Advanced Driver Assistance System is a growing trend in automotive industry that integrates multiple discreet components to create system level solution. A typical ADAS system in an automobile has single or multiple radar chips to transmit and receive electromagnetic waves and a microcontroller to process received data that is used for assisting driver in decision making. Radar chip and microcontroller share multiple interfaces that have stringent timing requirements for synchronization. Validation of such interfaces is an important part of ADAS validation to ensure efficient and reliable system. To validate these strict timings requires costly solutions with high end equipment. This paper presents a technique to minimize cost of system level validation by using FPGA. Proposed technique is used in ADAS validation for synchronizing high speed LVDS and multibit interface between automotive microcontroller and radar chip. This technique can be widely used in various validation scenarios where timing synchronization between different interface standards is required.