Design of a JTAG based run time reconfigurable system

In the past few years, the concept of run-time reconfigurable (RTR) systems has received a great deal of attention. RTR is the ability for a system to change its hardware configuration while computing, to address changing bottlenecks. This paper proposes a practical and effective means of implementing RTR systems with widely available and proven FPGA technology that keeps most of the practical benefits of RTR at the system level.