Hardware design of an RS (7, 5) data coding circuit used by digital communication systems

We design a multilevel data encoder for digital communication systems. Time constraints are imposed for a lot of services provided on portable devices. Hardware solutions are preferred more than software algorithms when the processing time and the power consumption are critical. Powerful error-correction coders processing multi-bit symbols can be implemented as hardware solutions in order to reduce the running-time and the CPU resource consumption. We design a battery powered encoder and investigate the minimum bit period value allowed at its inputs, and the minimum voltage from power supply required for operation.