Low-Pressure Wafer-Level-Packaged Capacitive Accelerometers With High Dynamic Range and Wide Bandwidth Using Nano-Gap Sloped Electrode Design

This paper reports on the design, fabrication, and characterization of wafer-level-packaged wide-bandwidth capacitive accelerometers with high aspect-ratio nanometer scale gaps utilizing sloped electrode configuration. Narrow gaps defined by the thickness of a sacrificial layer provide an increased electromechanical coupling that enables designing sensors with high operational bandwidth (~15 kHz), while maintaining low-noise performance. Furthermore, by sloping the sense fingers, one can get a larger traveling range for the proof mass than the thickness of the sacrificial layer, allowing for the realization of shock stops without additional fabrication steps. The proposed scheme was incorporated into a 1 mm x 1 mm accelerometer design with 270-nm gap and fabricated on a 40-μm-thick siliconon-insulator wafer using an high-aspect-ratio combined poly and single-crystal silicon (HARPSS) process, and subsequently wafer-level-packaged at a reduced pressure level of ~10 torr. The damping factor of the device was tailored using dedicated damping electrodes to ensure stable operation of the quasi-static accelerometer at low-pressure. The noise density is measured to be 221 μg/√Hz at 1 Hz, exhibiting a bias instability of 178 μg, with a scale factor nonlinearity of less than ±0.4% in a full-scale range of ±16 g, and showing an operational bandwidth greater than 8.5 kHz. Furthermore, a number of fabricated sensors were dropped from 1.8 m height to apply shock acceleration levels greater than 1000 g; all of the prototypes remain operational to their specifications after the free-fall test.