A Compact SISL Balun Using Compensated Interdigital Capacitor

This letter proposes a compact self-packaged balun using compensated interdigital capacitor (CIDC) based on substrate integrated suspended line (SISL) platform. Compared with traditional single-layer interdigital capacitor or parallel-plate capacitor, CIDC has higher capacitance density and thus the circuit size can be reduced. Using the CIDC, a compact SISL balun based on a modified second-order lattice balun topology is designed and fabricated using the standard printed circuit board process. The measurement results agree well with the simulation ones, which shows that within 66.7% bandwidth, the measured amplitude imbalance and phase imbalance are ±0.89 dB and 181 ± 1.4°, respectively. A compact circuit size of 0.06 λg × 0.11 λg is achieved.