Novel two-terminal vertical transition metal dichalcogenide based memory selectors

For resistive random access memory (RRAM) applications, selector devices play an important role to ensure that an individual memory element can be properly addressed through reading and writing while at the same time the information stored in the other cells of the same array does not get perturbed and power does not get wasted by undesirable leakage through unselected cells. An ideal selector device has to fulfill many criteria simultaneously such as: i) it has to support high on-state current densities (~10
⁷
A/cm
²
), ii) it has to exhibit a large nonlinearity at half bias NL
_1/2
, iii) it should be capable of bidirectional operation, and iv) it should be back-end-of-the-line (BEOL) compatible [1]. Moreover, its operation voltage needs to be compatible with the memory element. In the context of the above, two-terminal devices are desirable for ease of integration, and silicon based diodes, oxide pn-junction diodes and threshold voltage switches, such as metal-insulator-transition (MIT), are candidates that have been explored in the past. However, all of these three types of selector devices suffer from serious drawbacks. For example, two-terminal NPN silicon diodes do not conform to high-density, nonvolatile memories with 3D stack structures due to their high processing temperature between 700°C and 1000°C and the difficulty of growing high-quality epitaxial silicon over metals. Although amorphous silicon can eliminate the need for a single-crystal silicon seed and allows for low processing temperatures of around 800°C, it does not provide the required semiconducting performance. Oxide-based access devices on the other hand can be processed at low temperatures but do not reach the desired on-current levels, while MIT-based selectors cannot provide the desired NL
_1/2
. This makes developing novel types of selectors and ultimately a cell highly desirable.