28FDSOI technology for low-voltage, analog and RF applications

This paper describes a complete process/design co-optimization methodology based on Fully Depleted SOI (FDSOI) technology. A process optimization is detailed through significant effective capacitance reduction, in order to optimize jointly frequency/leakage ratio and high frequency performances. In this objective, an efficient and low cost offset-spacers morphology has been designed to achieve maximum performance benefits. Both digital, analog and RF performances are exposed, and compared to 28LP gate-first technology. We evidence that FDSOI brings energy efficiency digital and AMS/RF breakthrough for IoT.