A physically-secure write scheme of Multi-time Programmable RRAM for critical information storage

A physically-secure write scheme of Multi-time Programmable (MTP) RRAM for critical information storage is proposed and analyzed. The on-chip storage circuit can prevent physical attacks and illegal or malicious write operation. It improves the security level of existing MTP RRAM storage arrays by introducing an extra column storing protect-bits and using the address scrambling circuits. The proposed circuit is designed based on the RRAM which is logically compatible, so it provides higher resistance over physical attacks. And the MTP structure enables users with high priorities to change the stored security information.