Modeling of direct tunneling gate current in ultra-thin gate oxide MOSFETs: a comparison between simulators

The direct tunneling (DT) current through the 1.5 nm gate oxide layer of a 0.07 /spl mu/m channel length n-MOSFET is calculated using the semi-classical approximation of electron transport. The quantities needed for this calculation are extracted from three types of device simulation based on either Drift-Diffusion, Energy-Balance, or Monte Carlo transport model, for comparison. The maximum gate current is obtained for V/sub GS/=V/sub DD/ and V/sub DS/=0, i.e., a static point of CMOS inverter. It is shown that the DT effect is dominated by near-thermal electrons injected at the source side of the channel. As a consequence a good agreement is found between DT calculations from the three simulators, in spite of very different physical descriptions at the microscopic level.