Instability of Dynamic- $R_{\text ON}$ and Threshold Voltage in GaN-on-GaN Vertical Field-Effect Transistors

This paper investigates the recoverable degradation of GaN-on-GaN vertical transistors under positive gate bias stress. Based on combined pulsed measurements and constant voltage stress test, we demonstrate the following original results: 1) when subjected to moderate gate stress (0 V <; V
_GS
<; 3 V), the devices show a negative threshold voltage shift, which is correlated with a decrease in on-resistance. This process is ascribed to the detrapping of electrons from the Al
₂
O
₃
insulator, induced by a low positive bias and 2) for high stress bias(V
_GS
≥ 5 V), a strong positive shift in threshold voltage is observed. This effect, which shows a slow recovery, is ascribed to the injection of electrons from the accumulation region (channel) toward the dielectric. Temperature-dependent measurements and 2-D simulations were carried out to support the hypothesis on degradation, and to evaluate the contribution of surface and bulk current in the n-GaN drift layer.