Current-Mode Full-Duplex Transceiver for Lossy On-Chip Global Interconnects

This paper presents an energy efficient full-duplex (FD) current-mode transceiver for on-chip global interconnects. As it shares the same signaling port for transmitting and receiving signal, the wire efficiency is increased by 2× compared to unidirectional transceivers. The proposed hybrid transceiver has a directional inverter/buffer (DIB) circuit which inverts the outbound signal whereas conveys the incoming signal maintaining the same phase with a gain greater than one. As a result, the incoming signal is seamlessly separated from the strong outbound signal just by weighted addition of the two compound signals on the either sides of the DIB by a transconductor (gm) circuit. This is in contrast to existing subtraction based signal dissociation architecture. Importantly, the inbound signal retrieval process is a constructive one where the two components of the incoming signal are added up to provide inherent gain, making it suitable for lossy on-chip link. Moreover, the DIB circuit has very low active impedance at its input/output node and hence supports high bandwidth transmission without using any passive terminator. A prototype design has been implemented in 0.18-μm CMOS process for a global interconnect of 5 mm length. Measured results give an efficiency of 0.19 pJ/b/mm for an FD operation of 4.0 Gb/s.