HW/SW co-simulation of target C++ applications and synthesizable HDL with performance estimation

In this paper we present an environment for synthesis and simulation of the industrial digital system composed of the target microprocessor, memory and hardware devices. We use C++ for coding the program for the target microprocessor and VHDL for describing the operations in hardware. The presented system combines C++ compiler and VHDL tools for simulating the design. The applicability of the environment for performance estimation of the designed digital system is demonstrated.