A novel topology for time-interleaving in oversampling delta-sigma modulators

In this paper, a new time-interleaved /spl Delta//spl Sigma/ modulator topology with a reduced hardware complexity has been proposed. It has been shown that the proposed architectures are equivalent to that of the existing approach based on the block digital filtering idea. The theoretical results are verified by means of simulations. Finally, a generic M-channel time-interleaved L/sup th/ order modulator is demonstrated and the required hardware for both of the methods are quantified for comparison.