Compact Modeling for Silicon Photonic Heterogeneously Integrated Circuits

Photonic-integrated circuits fabricated on a heterogeneously integrated silicon platform have demonstrated record levels of integration and communication capacity. As photonic-integrated circuits become larger and more complex, designing and analyzing them demand modeling and simulation methodologies employed in matured electronic design automation. In this paper, the development of compact models for the building blocks of a fabricated optical network-on-a-chip is introduced. These models are implemented in both SPICE-compatible electronics design automation tools and dedicated photonic-circuit simulators. Model validation is conducted at both device and link levels, allowing the circuit designer to study the impact of individual device design on the overall link performance, paving the path for model-based design optimization of photonic-integrated circuits.