An optimized switching scheme for DC-link current ripple reduction in three-level T-type inverter

DC-link current ripple is a key point of the dc-link capacitor design for conventional inverters. The allowable current ripple is specified according to the capacity of capacitor. If the dc-link current over-ripple is produced by an electrolytic capacitor, it causes high heat-value, shortening of lifetime, and low-reliability. Thus, large passive components are commonly used for reducing the dc-link current ripple. However, these passive components lead to slow dynamic response and bulky size. Therefore, a new switching pattern is needed instead of large passive components. This paper introduces an optimized switching strategy by using two opposite effective voltage vectors instead of zero-state vector of each sector in three-level inverters. Simulation results show the effectiveness of the proposed method.