Decimal Full Adders Specially Designed for Quantum-Dot Cellular Automata

New emerging technologies, with low area/ power/latency properties, are gaining momentum as replacements for CMOS. In particular, for quantum-dot cellular automata (QCA) realization, many arithmetic circuits have been redesigned. The basic QCA elements are a three-way majority gate and an inverter. The trivial mapping of logical circuits to their QCA equivalents via direct replacement of AND and OR gates with partially utilized majority (PUM) gates (i.e., with a “0” and “1” input, respectively) leads to exploitation of QCA basic components. Regarding the revitalized decimal arithmetic units in digital processors, researchers have begun to design decimal arithmetic circuits on QCA. For example, several QCA decimal full adders are trivially designed via the aforementioned direct mapping. However, only one proposition in the literature tries to make better use of majority gates, but yet replaces many AND and OR gates by PUMs. In this brief, we propose a QCA decimal full adder that is mostly composed of fully utilized majority gates (i.e., with no constant inputs), and rarely includes PUMs. The proposed circuit has been designed and tested by QCADesigner, and compared with relevant previous works, where the cell count, area, and delay, show 39%, 78%, 12% improvement, respectively.