Dimension Effect on Breakdown Voltage of Partial SOI LDMOS

Dimension effect on breakdown voltage (BV) of lateral double-diffused metal-oxide–semiconductor field-effect transistor in partial silicon-on-insulator (PSOI) technology is comprehensively studied. The maximum BV (BV
_max
) is examined under various settings of the device length
${L}$
and the active silicon film thickness
${t}$
. It is shown that there exists an optimal pair of (
${L}$
,
${t}$
) for PSOI at which the highest BV can be achieved. The ratio of
${L}$
/
${t}$
is better chosen between 5 and 7 for the device designs, in particular,
$L/t={\mathrm{ 6}}$
can be considered as the optimal one theoretically. Moreover, impacts of the silicon window length
$L_{w}$
and the drift doping concentration
$N_{dr}$
on the BV, the on-resistance (
$R_{\mathrm{ on}}$
) and the figure-of-merit (
$=\!{\mathrm{ BV}}^{2}/R_{\mathrm{ on}}$
) are also carefully studied.