Surface Strained Ge-Cz Wafers by Sn-Implantation for High Electron and Hole Mobility

Ge-epi on Si wafers contain >1E7/cm2 TDD which degrades junction leakage and potentially also degrade mobility. Therefore we investigated using Ge-Cz wafers as an alternative free of Ge-epi TDD and observed that surface Sn implantation up to 16% can induce surface tensile strain-Ge measured by XRD enhancing top 30nm n-well surface layer mobility (μe) by 2.5x from 500cm
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/Vs up to 1250cm
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/Vs but the surface tensile strain-Ge degraded top 30nm p-well surface layer mobility (μh) by 73% from 3000cm
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/Vs to 800cm
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/Vs and surface bulk mobility by 74% from 1850cm
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/Vs to 480cm
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/Vs.