Minimum equivalent subspanner algorithms for topology aggregation in ATM networks

In a hierarchical network, the process of summarizing and compressing topology information at each hierarchical level to determine the topology information to be advertised at the level above is referred to as topology aggregation. Specifically, a problem of topology aggregation is to encode a full mesh representation of a given topology with a compact auxiliary graph, such that it could be used to reconstruct the full mesh representation with little or no distortion. This paper presents some algorithms that can be used to determine, for a given topology, a minimum representation with no compromise on accuracy. The minimum representation can be used to characterize the amount of redundancy in the topology. The application of these algorithms to generate complex node representations for topology aggregation in ATM networks is discussed.