FPGA implementation of optimized XBM specifications by transformation for AFSMs

The asynchronous paradigm is an alternative to digital system design because it eliminates the problems related to the clock signal, such as clock skew, clock distribution and power dissipation of the clock. An interesting style for asynchronous design, which is familiar to designers, divides the system in an asynchronous controller with synchronous datapath. A specification known as Extended Burst-Mode (XBM) is the most adequate one to describe the asynchronous controllers in this design style. The XBM specification must meet a number of properties to be implementable. A property known as the signal polarity may affect the controller performance. To satisfy the signal polarity, the designer must often introduce some state transitions that do not perform any operation, which are called in this paper as “dead transitions”. An XBM specification with dead transitions can reduce the controller performance. In this paper, we propose an algorithm that eliminates dead transitions in a XBM specification. This elimination occurs by transforming the original XBM specification, which leads to an optimization of the system performance. The algorithm was applied to seven well-known benchmarks and obtained a reduction of up to 37% in processing time.