Equivalent circuit models and model validation of SiC MOSFET oscillation phenomenon

SiC MOSFETs are known to provide a better performance compared to Si IGBTs. However, they can also introduce undesirable behaviors like switching oscillations due to the existence of parasitic elements. In this paper, we introduce the turn-on and turn-off switching equivalent circuit models and validate these models with commercially available SiC MOSFETs. Based on the models, theoretical analysis is carried out and the guidance of damping circuit design is provided. Circuit simulations and experimental measurements are performed to validate the modeling method as a general treatment for ultrafast switching applications. In addition, a method of extracting parasitic inductances of packaged SiC MOSFETs using a network analyzer is introduced. The measured parasitic inductance values prove to be more realistic than the values estimated by the device manufacturer when being used in the equivalent circuit models. Furthermore, a detailed justification and experimental validation on the assumption of gate loop resistive contribution are provided.