Fully Integrated Digitally Assisted Low-Dropout Regulator for a NAND Flash Memory System

In this paper, a fully integrated digitally assisted low-dropout regulator (LDO) for a NAND flash memory system is proposed and verified using 500 nm I/O CMOS transistors. By combining an amplifier (AMP)-based LDO with a comparator (CMP)-based LDO, the proposed LDO achieves both fast load response in the transient state and accurate regulation in the steady state, which are advantages of the CMP-based LDO and AMP-based LDO, respectively. Moreover, loop frequency stability is satisfied in a wide range of load currents between 0 and 150 mA by using the simple structure of the g
_m
-boost cell to insert an auxiliary path. For an input voltage range of 2.3-3 V and an output voltage of 2.1 V, the measured output droop is 225 mV for a 150 mA load step in the load transition time of 20 ns with the total bias current of 81 μA. The fabricated prototype chip occupies 160 × 610 μm
²
with an on-chip output capacitor of 2 nF.