4.5 ms Effective Carrier Lifetime in Kerfless Epitaxial Silicon Wafers From the Porous Silicon Process

Kerfless silicon wafers epitaxially grown on porous silicon (PSI) and subsequently detached from the growth substrate are a promising candidate for reducing the cost of the silicon wafer, which is particularly important for silicon photovoltaics. However, the carrier lifetime of these epitaxial wafers has to be at least as high as that of today's standard Czochralski (Cz)-grown wafers in order to become competitive. Here, we compare the measured lifetimes of n-type epitaxial silicon wafers that grow on PSI and epitaxial silicon wafers that grow on nonporous surfaces of epi-ready wafers. The latter are subsequently ground to have free-standing epitaxial wafers. Gettering improves the carrier lifetime of the ground wafers up to 4.2 ms. In contrast, PSI wafers show regions with effective lifetimes of 4.5 ms, even without gettering. This lifetime value is a factor of four larger than lifetimes of Cz wafers which are typically employed in today's PERC solar cells. We model the lifetime measurements with three Shockley-Read-Hall (SRH) defects: two defects that exist in the PSI and in the epi-ready wafer and a third defect that is only present in the epi-ready wafer.