The implementation of large FFT convolution on heterogeneous multicore programmable system

Nowadays FFT convolution is widely applied to digital signal processing (DSP), and the past few years have witnessed the development of the heterogeneous multicore programmable system (HMPS). In addition, HMPS has been the mainstream in the field of DSP. So it is very important to study the high efficient implementation of large FFT convolution on the HMPS. In this paper, a high efficient pipelined overlap-add filter based on the overlap-add FFT convolution method is designed for the input streaming data. This paper introduces the implementation of large FFT convolution on the HMPS and achieves the high accuracy of filter result. Furthermore, a pipeline technology is adopted for the filter design to improve processing speed, throughout and parallelism of tasks. The Xilinx XC7V2000T FPGA verification result shows that the larger sampling points are involved in computing, the higher task parallelism, processing speed and throughout will be obtained, using the suitable and efficient mapping scheme on the HMPS. When the sample points reach 1M, the system average task parallelism is 5.33 with 2.745E6 clock cycles and the precision of 10E-4.