Multiple-valued-logic based combinational building blocks

Multiple-Valued-Logic is gaining more importance in the present days due its increased data processing capacities. It is becoming one of the best alternatives to the VLSI technology scaling technique since the scaling technique has already reached its limits. This paper presents the design, development and functional verification of MVL based combinational building blocks such as Adders, Multiplexers. The future prospects of Multiple Valued Logic indicate that MVL can offer higher data rates, higher channel capacity, reduced quantization error for digital communication systems.