Developing Power Semiconductor Device Model for Virtual Prototyping of Power Electronics Systems

Virtual prototyping (VP) is very important for power electronics systems design. A virtual prototyping design tool based on different modelling technology and model order reduction is proposed in the paper. In order to combine circuit electromagnetic model with power semiconductor device models, a SiC-JFET behavioural model is presented and implemented in the design tool. A half bridge circuit using SiC-JFET devices is thus represented in the VP software. The presented SiC-JFET behavioural model is then validated by comparing with experimental measurements on switching waveforms.