A Study of Vertical Thin Poly-Si Channel Transfer Gate Structured CMOS Image Sensors

In this letter, the image characteristics of CMOS image sensor (CIS) pixels using a vertical thin poly-Si channel (VTPC) transfer gate (TG) are established for the first time. The study of three-dimensional (3D) structures in the image sensor field has been started by 3D Flash memories. By adopting the poly-Si channel fabrication concept of 3D NAND flash memories—appropriately modified to fit the requirements of a TG in CIS pixel applications—the VTPC structure effectively suppresses the grain boundary effect. The VTPC-TG performance improves as the poly-Si channel becomes thinner. The possibility of implementing 3D pixel-based CIS is confirmed by applying the fabricated VTPC-TG to a mass-produced 1.12-
$\mu \text{m}$
BSI product, and using it to capture 5-Mpixel images.