An analytical thermal noise model of deep submicron MOSFET's

An analytical model for circuit simulation to describe the channel thermal noise in MOSFET's for all channel length down to deep submicron is presented and verified by measurements. Contrary to the thermal equilibrium assumption, this model includes the influence of the increasing electrical field with downscaling on the channel carrier (electron, hole) equivalent noise temperature. If not taken into account, simulation errors of up to 100% and more in the thermal noise of half micron transistors and below occur.