A modular braodband (ATM) switch architecture with optimum performance

This paper focuses on the generic problem of designing a large NxN (N 1000) high-performance, broadband packet (or ATM) switch. Despite recent advances in switch architectures, practical switch dimensions continue to be severely limited by both the technological and physical constraints of packaging (e.g., chip or board sizes). Here, we focus on switch growability: we provide ways to construct arbitrarily large switches out of modest-size packet switches, without sacrificing overall delay/throughput performance. We propose and study a growable switch architecture based on three key principles: (a) a Generalized Knockout Principle exploits the statistical behavior of packet arrivals and thereby reduces the interconnect complexity; (b) output queueing yields the best possible delay/throughput performance; and (c) distributed intelligence in routing packets through the interconnect fabric eliminates internal path conflicts. Other attractive features of the proposed architecture include the guarantee of first-infirst-out packet sequence, and broadcast and muldcast capabilities. In a Broadband ISDN example, we show a 2048x2048 switch configuration with building blocks of 42x16 packet switch modules and 128x128 interconnect modules, both of which fall within existing hardware capabilities. We present an upper bound on the cell loss probability for arbitrary patterns of independent cell arrivals, and show that the cell loss can be made negligibly small. For example, to guarantee less than 10/sup -9/ cell loss probability, this growable architecture requires packet switch modules ofilimension 47x16,45x16, 42xl6, and 39x16 for 100%, 90%, 80%, and 70% traffic loads, respectively.