Voltage dips detection in a system with grid-tie inverter

The paper describes voltage dips detection method in cases of grid-tie inverter systems. A newly developed harmonic estimation algorithm, Reduced FFT (RFFT), has been applied. The grid-tie inverter system has been modelled and simulated in the Matlab/SimPowerSystems environment. Laboratory experiment was carried out with dSPACE control hardware. The voltage dips were produced by grid emulator. For voltage dips detection the algorithm, which is able to monitor the 3^rd harmonic is considered suitable in most of the cases. It is shown, both in simulation and experiments that the proposed method is reliable, successful and quick enough. It is much faster than existing ones, i.e. detection time is less than one half-period, so it is more convenient for grid-tie inverter protection purposes.