Non-linear dynamics of phase synchronization systems including frequency conversion devices

A number of specific aspects is discussed concerning the performance of frequency conversion PLL systems in the UHF range. False lock-in probability at multiple frequencies due to wideband noise sources has been analyzed for pulse PLLs with varying division ratio dividers (VDRD). Recommendations have been obtained on the false lock-in elimination. A series of time delay PLL system models has been investigated. It has proved to be advisable in engineering calculations to apply the models using the first members of the ideal delay operator of Pade functions expansion and the small parameter approach. The results of theoretical investigations were practically used in time interval generators and UHF synthesizer developments.