Bandpass /spl Sigma//spl Delta/ modulator employing undersampling and on-chip Q-enhanced LC filter

The rapid development of wireless digital radio systems (especially cellular telephony) has led to a great effort to design high resolution and high speed bandpass analog-to-digital converters. In this paper, an implementation of a continuous-time bandpass /spl Sigma//spl Delta/ modulator for use in modern cellular/PCS receivers is given. The modulator operates at a 195 MHz IF with a bandwidth of 300 kHz. The bandpass filter is implemented using an on-chip LC resonator with Q-enhanced circuit. The design employs undersampling the IF signal allowing use of standard CMOS technology and reducing the complexity of subsequent digital signal processing stages. Also, it shows a possibility of developing a receiver offering the performance of a superheterodyne scheme without requiring extra mixers to downconvert the IF signal to baseband. The modulator was implemented in a 1.2 /spl mu/m CMOS process.