Enhanced light emission from a silicon n/sup +/pn CMOS structure

A special Si n/sup +/pn CMOS technology compatible device has been designed and which yields an optical emission intensity 2 nW per 2 micron diameter of chip area. The electrical-to-optical conversion efficiency is 1.5/spl times/10/sup 6/ which is nearly three orders of magnitude higher than previously published values for Si LED devices that operate in the avalanche mode. The design of the device was based on Monte Carlo simulations and predictions which showed that about 3 orders magnitude increase could be obtained for the photon emission rate if the prevailing electric field in a pn junction was increased to 600 kV cm/sup -1/. The high emission intensity in the small spot area the higher conversion efficiencies, and the complete CMOS compatibility of the device, the fact that the emission intensity is about three orders of magnitude higher than the detectability limit of detector devices of similar size, all predict some promising technological applications in future generation LSI and VLSI silicon optoelectronic circuitry.