A Merged CBi-CMOS Gate Array With Emitter Follower Buffers

A new Merged Complementary Emitter Follower BiCMOS (C-EF-BiCMOS) circuit with a double Darlington diode, permits the use of FET's below a quarter of micron, while keeping 3.6V power supply. A loaded speed of 180ps is possible with leff - 0.35mum in one of the simplest BiCMOS technology. A complete circuit family implemented in a gate array structure with very high density of integration due to common diffusions between the bipolars NPN/PNP and the FET devices, is described.