A 256K-Bit Non-volatile PSRAM With Pace Recall And Chip Store

This paper descibes a 32k x 8 Non-Volatile Pesudo-SRAM (NVPSRAM) which combines an EEPROM and a DRAM within the same memory cell structure using 3 transistors and 1 capacitor. This 5 volt only NVPSRAM operates as a pseudo-SRAM, and achieves more than 10 store cycle endurance and typical access time of 50 ns using a loose 0.8μm design rule, triple poly, single metal, n-well CMOS process technology.