Register file circuits and post-deployment framework to monitor aging effects in field

This paper presents novel 6-T SRAM register file (RF) circuits and in-field framework for managing chip's lifetime after deployment. Our proposed RF circuits can in-situ sense threshold voltages (V
_t
) of all six transistors of every bitcell in an RF robustly against temperature variations. This allows us (1) to monitor aging effects of both NMOS and PMOS such as negative and positive bias temperature instabilities (NBTI, PBTI) and (2) to monitor those in the post deployment condition where environmental parameters, notably temperature, cannot be easily controlled. Using these sensed V
_t
's, our proposed post-deployment framework can estimate critical circuit-level parameters of an RF such as data retention voltage (DRV) and read access time (T
_ACC
). After chip's deployment, our proposed sensing circuits and framework can be periodically (e.g., every month) exercised to diagnose the reliability of an RF through chip's lifetime. We can use the results of the diagnosis to potentially trigger countermeasures. The area overhead of adding our proposed sensing capability to a 32×32b RF is 8.5%.