Comparison of a 65 nm CMOS Ring- and LC-Oscillator Based PLL in Terms of TID and SEU Sensitivity

In this work, a comparison has been made between a low noise ring-oscillator and an LC-oscillator Phase Locked Loop (PLL). An ASIC has been developed to conduct irradiation experiments targeting high-energy physics applications. Two different samples were irradiated up to a total ionizing dose (TID) in SiO
₂
of 200 Mrad and 600 Mrad with a 100°C thermal annealing step. Single-Event Upset (SEU) tests were performed with heavy ions with LETs (Linear Energy Transfer) between 3.2 and 69.2 MeV.cm
²
/mg. A Two-photon absorption (TPA) laser facility has been used to provide detailed results on the SEU sensitivity. Both independent PLLs have identical loop dynamics to allow a fair comparison including a Triple-Modular Redundant (TMR) divider and TMR phase detector. Furthermore these circuits consume the same amount of power. The PLLs were processed in a commercial 65 nm CMOS technology.