Low power fractional-N frequency synthesizer for IEEE 802.11 a/b/g/n standards in 90-nm CMOS

This paper presents a fully integrated fractional-N frequency synthesizer that covers the entire frequency bands specified in the IEEE 802.11 a/b/g/n. A new approach is proposed for sampled loop filter in fractional-N PLLs to reduce reference spurs. The implementation is achieved in 90-nm standard CMOS technology. According to simulations the VCO has a phase noise of -117.5 dBc/Hz at 1 MHz offset for a 2.45 GHz output, and the reference sideband is -56.5 dBc at 5.5 GHz. the power dissipation from a 1.2-V supply is 4.51-5.02 mW.