Design and implementation of an FPGA-based Real-time simulator for H-Bridge converter

This paper presents a methodology for implementing of the mathematical model of H-Bridge converter in an FPGA-based Real-time simulator. Furthermore, it introduces a new method for choosing parameters of the Associate Discrete Circuit (ADC) model of semiconductor switches. The ADC-based model allows obtaining a fixed topology irrespective of switches states for the power electronic converters in the digital simulation. Backward-Euler based discretized state space matrix (SSM) of the circuit used for ADC parameter. Choosing appropriate switch parameter is based on 1) reducing the distance of SSM eigenvalues from origin in z-Plane to reduce settling-time of system response; and 2) reducing the angle of SSM eigenvalues to increase damping factor of the system. Modified nodal analysis (MNA) approach is used for solving the circuit model. Verilog code to simulate the behavior of the circuit is developed and implemented on a SPARTAN-6 FPGA. Simulation step times as low as 200ns is easily achieved. Experimental result presented confirms the performance of applied method for Real-time simulation of the H-bridge converter.