Multiplier-Less Stream Processor for 2D Filtering in Visual Search Applications

A new 2D convolution-based filter is presented, which is specifically designed to improve visual search applications. It exploits a new radix-3 partitioning method of integer numbers, derived from the weight partition theory, which allows substituting multipliers with simplified floating point (FP) adders, working on 32-b FP filter coefficients. The memory organization allows elaborating the incoming data in raster scan order, as those directly provided by an acquisition source, without frame buffers and additional aligning circuitry. Compared with the existent literature, built around conventional arithmetic circuitry, the proposed design achieves state-of-the-art performances in the reduction of the mapped physical resources and elaboration velocity, achieving a critical path delay of about 4.5 ns both with a Xilinx Virtex-7 field-programmable gate array and CMOS 90-nm std_cells.