Modeling of Fermi-Level Pinning Alleviation With MIS Contacts: n and pMOSFETs Cointegration Considerations—Part I

Aiming at overcoming the Fermi-level pinning (FLP) occurring at the metal/semiconductor interfaces, metal/insulator/semiconductor (MIS) contacts to n-Si and p-Si are usually treated in separate optimization studies, yet with no particular insight on their technological compatibility. In this paper, using 1-D analytical modeling of MIS contacts, it is shown that in order to fully benefit from FLP mitigation on both n- and p-type Si, a single-insertion/single-metallization scheme cannot be considered. In addition, it is demonstrated that associating given numerical values of contact resistivity with MIS contacts results in a thorny problem, since their I-V characteristics are nonsymmetric nonlinear.