Design and realization of a digital /spl Delta//spl Sigma/ modulator for fractional-n frequency synthesis

The basic operation of a fractional-n frequency synthesizer has been published, but to date little has been presented on the digital /spl Delta//spl Sigma/ modulators which are required to drive such synthesizers. This paper provides a tutorial overview, which relates digital /spl Delta//spl Sigma/ modulation to other applications of /spl Delta//spl Sigma/ modulation where the literature is more complete. The paper then presents a digital /spl Delta//spl Sigma/ modulator architecture which is economical and efficient and which is practical to realize with commercially available components in comparison with other possible implementations which require extensive custom very large-scale integration (VLSI). A demonstration is made of a 28-b modulator using the architecture presented, which provides a 25-MHz tuning bandwidth and <1-Hz frequency resolution. The modulator is demonstrated in an 800-MHz frequency synthesizer having phase noise of -90 dBC/Hz at a 30-kHz offset.