Towards contact integration for III–V/Silicon heterogeneous photonics devices

Silicon photonics is of great interest as it opens the way to large bandwidth and high data rates. A pioneer Silicon photonics scheme consists in integrating III–V lasers on the SOI substrates containing the passive components. However, key developments are necessary to co-integrate III–V devices with CMOS very large scale integration (VLSI). In this paper we propose a CMOS-compatible integration scheme of contacts (i.e. semiconductor metallization and plug) on III–V surfaces taking into account the limitations fixed by the operating laser device. Based on metallurgical, morphological, optical and electrical studies, processes are submitted and reviewed for the purpose of forming stable and reproducible contacts with low resistivity in a 200 millimeters fab line.